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Principal Design Engineer

Location: San Jose, CA, United States
Job # 10200356
Date Posted: 11-28-2017
Principal Design Engineer
Contract: 12/04/17 -- 05/31/18
San Jose Main Campus, building 6
Salary: $110-115/hour (DOE)
 
Key responsibilities:
o   Balancing performance, area, power, and complexity.
o   Interfacing to third-party IP.
o   Working with physical design team on floor-planning and other physical issues.
o   Determining and executing development, integration, bring-up and test plans.
o   Writing detailed complete internal specifications.
o   Completing implementation in RTL and evaluating synthesis results for performance and cost.
o   Ensuring robust and complete timing constraints and evaluating STA results.
o   Working closely with verification teams during development.
o   Collaborating with firmware teams during specification and integration.
o   Working with system and design validation testing teams during bring-up and DVT phases.
o   Guiding diagnostic and test teams in recommendations to achieve appropriate fault isolation, function and robustness tests.
o  Take responsibility for PCIE + custom host interface (already designed) and follow through implementation phases working with synthesis and physical design teams.
o   Solve problems before they occur.
                                                                                                                                      
Qualifications:
o   5-15 years of relevant experience. 
o   Degree in Electrical or Computer Engineering, graduate level or compensating experience.
o   Proven success in development of complex ASIC, FPGAs and products.
o   Demonstrated capability to design major blocks involving ASIC, IPs, logic, and FPGAs.
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